The quad 8-, 10- and 12-bit DACs. They operate from a 2.5 to 5.5V supply consuming just 500µA at 3V, and feature a power-down mode that further reduces the current to 80nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails. Available in thin shrink small outline packages (TSSOP).
Guaranteed monotonic by design
Power-on-reset to zero volts
Double-buffered input logic
Simultaneous update of DAC
Outputs via LDAC pin (active low)
Asynchronous clear facility via CLR pin (active low)